The present invention relates generally to automatic gain control circuits and, more specifically, to automatic gain control circuits used in radio receivers having digital signal processing.
Automatic gain control (AGC) systems for radio receivers are well-known. AGC systems typically include an amplitude detector, a filter or integrator in a feedback path, and one or more gain-controlled amplifiers operating at radio frequencies (RF) and/or intermediate frequencies (IF). The purpose of AGC is to maintain the output signal approximately at a constant level as the RF signal varies over a wide range. It is known that for an AGC loop to maintain constant bandwidth over a wide range of input signals, the amplifier control characteristic must be such that the gain is an exponential function of the control input, which is typically expressed as a voltage. In other words, the control input must have a logarithmic relationship to the desired gain. If this condition is met, a plot of gain versus control input will be a straight line, and the characteristic is described as log-linear. The log axis is commonly stated in decibels (dB), a scaled logarithmic unit. High frequency receivers having an AGC range ("dynamic range") of up to approximately 125 dB are known in the art.
Conventional receivers have analog circuitry throughout for amplification, filtering, frequency translation (mixing), and detection (demodulation). Although an AGC circuit can easily be designed for such receivers, it is well-known that a design tradeoff exists between responsiveness and stability. To provide responsiveness, the receiver IF filter is commonly included within the AGC feedback loop. However, the presence of poles from the IF filter within the feedback loop inherently decreases stability. To avoid instability that would otherwise be introduced by the poles from the IF filter, the bandwidth of the AGC loop is commonly made very narrow.
Newer receivers may use a combination of analog and digital signal processing to improve performance and manufacturability with maximal economy. Typically, such receivers have an analog input section for amplifying a weak RF input signal and converting it to a (lower) IF. The receiver digitizes the IF signal using an analog-to-digital (A/D) converter and performs the final frequency translation, filtering, and demodulation functions digitally.
The relatively narrow dynamic range of economical A/D converters reduces the utility of conventional analog AGC circuits in receivers having both analog and digital signal processing because the dynamic range of the IF signal would need to be reduced to accommodate the A/D converter before performing AGC. To illustrate this point, it is desirable to provide at least 125 dB dynamic range in such receivers. Economical A/D converters generally have a maximum of 16 bits of resolution, yielding a maximum dynamic range of less than 98 dB between signal and a noise floor. It is a desirable design practice, however, to limit the dynamic range of the signal to about 65 dB to maintain a suitable signal-to-noise ratio (SNR). Therefore, it would be desirable in such a receiver to perform AGC while reducing the input signal dynamic range by about 60 dB in the analog input section to accommodate an economical 16 bit A/D converter. These problems and deficiencies are clearly felt in the art and are solved by the present invention in the manner described below.